In recent years, mobile electronic devices such as cellular phones and laptop personal computers, and in-car electronic devices to be installed on cars have become common with the development of electronics technology, and a reduction in size with multi-functionalization has been required for the electronic devices.
On In order to achieve the reduction in size with multi-functionalization for the electronic devices, more semiconductor elements have been used such as various types of ICs and LSI, and accordingly, the electronic devices have decreased the noise immunity.
Conventionally, power lines for semiconductor elements are provided with a film capacitor, a laminated ceramic capacitor, a laminated semiconductor ceramic capacitor, or the like as a bypass capacitor, thereby to ensure the noise immunity for the electronic devices.
In particular, what is commonly the case is that a capacitor with a capacitance on the order of 1 nF is connected to an external terminal, thereby to absorb high-frequency noises in the case of car navigation systems, car audio systems, in-car ECUs, etc.
However, while these capacitors deliver superior performance on the absorption of high-frequency noises, the capacitors themselves do not function to absorb high-voltage pulses or static electricity. For this reason, there is a possibility that the high-voltage pulses or static electricity may cause the electronic device to malfunction or cause the semiconductor elements to be broken if high-voltage pulses or static electricity are input to the electronic devices. Particularly, when the capacitor has a low capacitance on the order of 1 nF, there is a possibility that this may cause the capacitor itself to be broken since an ESD (electro-static discharge) withstand voltage is extremely low (for example, about 2 to 4 kV).
Conventionally, as shown in FIG. 9, it is commonly the case that a bypass capacitor 104 is disposed to a power source line 103 being connected between an external terminal 101 and a semiconductor element 102, and a zener diode 105, for example, is connected to the power source line 103 in parallel to the bypass capacitor 104. The zener diode 105 plays a role in protecting the bypass capacitor 104 and protecting the semiconductor element 102, and thereby, an ESD withstand voltage is ensured to protect the semiconductor element 102.
However, when the zener diode 105 is disposed in parallel to the bypass capacitor 104 as described above, the number of components is increased to cause an increase in cost, and moreover, space for the placement of the components has to be secured, and there is thus a possibility that an increase in the size of the device may result.
A SrTiO3-based grain boundary insulation type laminated semiconductor ceramic capacitor is known to have a varistor characteristic, and has received attention as a countermeasure item for ESD since application of a voltage of a certain level or more allows a large current to flow.
If this type of the laminated semiconductor ceramic capacitor can provide not only the immunity to ESD but also the protection of a semiconductor element 102, only one laminated semiconductor ceramic capacitor 106 can cover these functions in place of the capacitor and zener diode conventionally used as shown in FIG. 10. Thereby, the number of components or cost is reduced, and standardization of design is facilitated, and therefore a capacitor having added values can be provided.
Patent Document 1 proposes a laminated semiconductor ceramic capacitor with a varistor function which includes a laminated sintered body obtained by alternately laminating and firing a plurality of semiconductor ceramic layers formed of a SrTiO3-based grain boundary insulated semiconductor ceramic and a plurality of internal electrode layers, and external electrodes on both ends of the laminated sintered body, the external electrodes electrically connected to the internal electrode layers, wherein the semiconductor ceramic has a compounding molar ratio m of a Sr site to a Ti site satisfying the relational expression 1.000<m≦1.020, a donor element is solid-solved in crystal grains, the acceptor element is present in a grain boundary layer in the range of 0.5 mol or less (not including 0 mol) with respect to 100 mol of the Ti element, and the average grain diameter of the crystal grains is 1.0 μm or less.
The ceramic raw materials in Patent Document 1 including a donor compound are weighed so as to adjust the compounding molar ratio of a Sr site to a Ti site to a predetermined ratio, mixed/pulverized, then subjected to a calcining treatment at a temperature of 1350° C. to prepare a calcined powder, and the calcined powder and an acceptor compound are wet-mixed/pulverized for 16 hours, and the resulting mixture is heat-treated to prepare a heat-treated powder. Thereafter, the heat-treated powder is subjected to forming process to prepare a ceramic green sheet, internal electrode layers and the ceramic green sheets are alternately laminated to form a laminate, and then the laminate is subjected to a primary firing treatment at a firing temperature of 1250° C. in a reducing atmosphere to be brought into a semiconductor, and the laminate is subjected to a secondary firing treatment in an atmosphere of the air to form a grain boundary insulated layer, and thereafter an external electrode is formed to obtain the laminated semiconductor ceramic capacitor with a varistor function.
In this Patent Document 1, it becomes possible to obtain a laminated semiconductor ceramic capacitor in which an average grain diameter of crystal grains is 1.0 μm or less to allow oxygen to easily go around the grain boundary during secondary firing, and thereby, formation of a Schottky barrier becomes sufficient, the specific resistance is large, and the ESD withstand voltage is as large as 30 kV or more.
Further, the firing temperature in the primary firing treatment in Patent Document 1 is set to a temperature equal to or less than the calcining temperature, and thereby, grain growth of the crystal grain is hardly promoted during the primary firing treatment, and therefore the crystal grain is prevented from becoming large and realizes an average grain diameter of crystal grains of 1.0 μm or less.